Dr Sangeet Saha
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Email
sangeet.saha@essex.ac.uk -
Location
3A.526, Colchester Campus
Profile
Biography
Dr. Saha is a lecturer (assistant professor) at the School of Computer Science and Electronic Engineering, University of Essex. In addition, he is a member of the school's Robotics and Embedded Systems Research Group. Prior to that, he worked as a lecturer at the University of Huddersfield, UK, and Senior research officer (Postdoctoral scholar) at the University of Essex, UK. Primarily, his research expertise is in embedded systems, with specific interests that include real-time scheduling, scheduling for FPGAs, fault tolerance, and approximation-based real-time computing. In his Ph.D., he presented a few novel ideas for designing scheduling strategies for hard real-time tasks on reconfigurable hardware (FPGAs) and multicore systems (MPSoC). During his postdoctoral research, he worked at the EPSRC National Centre for Nuclear Robotics (NCNR), based at the University of Essex. In NCNR, he developed cutting-edge technology for designing embedded systems to provide redundancy, resilience, and robustness against damage by various extreme environments. Currently, at Essex, he is working on two research directions. First, he explores efficient tasks to processor-cores mapping strategies in approximated real-time computing, both at the system and architectural levels, so power can be minimized while maximizing execution efficiency. Secondly, his research involves developing FPGA/GPU heterogeneous-based systems to execute deep learning techniques on embedded edge devices with limited resources and latency budgets. He is currently leading one UKRI funded project and is involved with several ongoing EPSRC-funded projects at the research group. He published several of his research contributions in conferences like CODES+ISSS, ISCAS, and Euromicro DSD and journals like ACM Transactions on Embedded Computing Systems (TECS), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), IEEE Transactions on Systems, Man, and Cybernetics: Systems (TSMC), and IEEE Transactions on Parallel and Distributed Systems (TPDS). He also co-authored a book on real-time scheduling for FPGAs, published by Springer. Additionally, he has served as a technical committee member for several conferences. He also received the Yerun (Young European Research University) Research Mobility Award 2021 and currently working as a YERUN fellow with the University of Bremen, Germany. In addition, he has strong collaborations with industry and has been working with several universities in the UK and EU. He is a Fellow of the Higher Education Academy (FHEA). Prospective students interested in researching real-time embedded systems, computer architecture, and system design for various application domains are encouraged to contact him by e-mail along with their CVs.
Appointments
University of Essex
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Lecturer In Embedded Systems, School of Computer Science and Electronic Engineering, University of Essex (16/1/2023 - present)
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Senior Research Officer, CSEE, University of Essex (1/5/2018 - 31/10/2021)
Other academic
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Lecturer in Computer Science, Department of Computer Science, University of Huddersfield (1/11/2021 - 15/1/2023)
Research and professional activities
Research interests
Real-time Embedded System (FPGAs & MPSoCs) Design
Resource Allocation for IoT/ Cloud computing
Reliabilty, fault tolerance and hardware Security for embedded devices
AI in resource constrained embedded evices
Teaching and supervision
Current teaching responsibilities
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Mathematics for Computing (CE141)
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Team Project Challenge (CE201)
Publications
Journal articles (19)
Gao, C., Saha, S., Zhu, X., Jing, H., McDonald-Maier, KD. and Zhai, X., (2023). Application Level Resource Scheduling for Deep Learning Acceleration on MPSoC. Journal of Signal Processing Systems
Khanam, Z., Aslam, B., Saha, S., Zhai, X., Ehsan, S., Stolkin, R. and McDonald-Maier, K., (2022). Gamma-Induced Image Degradation Analysis of Robot Vision Sensor for Autonomous Inspection of Nuclear Sites. IEEE Sensors Journal. 22 (18), 17378-17390
Saha, S., Zhai, X., Ehsan, S., Majeed, S. and McDonald-Maier, K., (2022). RASA: Reliability-Aware Scheduling Approach for FPGA-Based Resilient Embedded Systems in Extreme Environments. IEEE Transactions on Systems, Man, and Cybernetics: Systems. 52 (6), 3885-3899
Majumder, A., Saha, S., Chakrabarti, A. and McDonald-Maier, K., (2022). Energy-Aware Real-time Tasks Processing for FPGA Based Heterogeneous Cloud. IEEE Transactions on Sustainable Computing. 7 (2), 414-426
Lu, Y., Zhai, X., Saha, S., Ehsan, S. and McDonald-Maier, KD., (2022). A Self-adaptive SEU Mitigation Scheme for Embedded Systems in Extreme Radiation Environments. IEEE Systems Journal. 16 (1), 1436-1447
Saha, S., Chakraborty, S., Zhai, X., Ehsan, S. and McDonald-Maier, K., (2022). ACCURATE: Accuracy Maximization for Real-Time Multi-core systems with Energy Efficient Way-sharing Caches. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41 (12), 5246-5260
Wang, X., Yu, W., Ding, Z., Zhai, X. and Saha, S., (2022). Modeling and Analyzing of Breast Tumor Deterioration Process with Petri Nets and Logistic Regression. Complex System Modeling and Simulation. 2 (3), 264-272
Saha, S. and McDonald-Maier, K., (2022). DELICIOUS: Deadline-Aware Approximate Computing in Cache-Conscious Multicore. IEEE Transactions on Parallel and Distributed Systems. 34 (2), 718-733
Khanam, Z., Saha, S., Ehsan, S., Stolkin, R. and McDonald-Maier, K., (2021). Coverage Path Planning Techniques for Inspection of Disjoint Regions with Precedence Provision. IEEE Access. 9, 5412-5427
Lu, Y., Chen, X., Zhai, X., Saha, S., Ehsan, S., Su, J. and McDonald-Maier, K., (2021). A Fast Simulation Method for Analysis of SEE in VLSI. Microelectronics Reliability. 120, 114110-114110
Chakraborty, S., Saha, S., Själander, M. and Mcdonald-Maier, K., (2021). Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive QoS Maximization. ACM Transactions on Embedded Computing Systems. 20 (5s), 1-25
Majumder, A., Saha, S. and Chakrabarti, A., (2020). EAAM: Energy-aware application management strategy for FPGA-based IoT-Cloud environments. The Journal of Supercomputing. 76 (12), 10258-10287
Zhu, S., Sun, H., Duan, Y., Dai, X. and Saha, S., (2020). Travel Mode Recognition from GPS Data Based on LSTM. Computing and Informatics. 39 (1-2), 298-317
Zhu, S., Sun, H., Duan, Y., Dai, X. and Saha, S., (2020). TRAVEL MODE RECOGNITION from GPS DATA BASED on LSTM. Computing and Informatics. 39 (1-2), 298-317
Jia, M., Yu, W., Zhai, X. and Saha, S., (2019). Modeling and Analysis of First Aid Command and Dispatching System of Cloud Medical System. IEEE Access. 7, 168752-168758
Khaliq, A., Saha, S., Bhatt, B., Gu, D. and McDonald-Maier, KD., (2019). Profi-Load: An FPGA-Based Solution for Generating Network Load in Profinet Communication.. CoRR. abs/1905.00247
Saha, S., Sarkar, A., Chakrabarti, A. and Ghosh, R., (2018). Co-Scheduling Persistent Periodic and Dynamic Aperiodic Real-Time Tasks on Reconfigurable Platforms. IEEE Transactions on Multi-Scale Computing Systems. 4 (1), 41-54
Saha, S., Sarkar, A. and Chakrabarti, A., (2017). Spatio-Temporal Scheduling of Preemptive Real-Time Tasks on Partially Reconfigurable Systems. ACM Transactions on Design Automation of Electronic Systems. 22 (4), 1-26
Saha, S., Sarkar, A. and Chakrabarti, A., (2015). Scheduling Dynamic Hard Real-Time Task Sets on Fully and Partially Reconfigurable Platforms. IEEE Embedded Systems Letters. 7 (1), 23-26
Books (1)
Guha, K., Saha, S. and Chakrabarti, A., (2021). Self Aware Security for Real Time Task Schedules in Reconfigurable Hardware Platforms. Springer International Publishing. 9783030797003
Conferences (29)
Aslam, B., Saha, S., Zaffar, M., Ehsan, S., Zhai, X., Cazzaniga, C., Frost, C., McDonald-Maier, K. and Stolkin, R., Measuring the Degradation of Commercial Cameras Under Fast Neutron Beam
Gao, C., Zhu, X., Saha, S., McDonald-Maier, K. and Zhai, X., (2023). Modelling and Analysis of FPGA-based MPSoC System with Multiple DNN Accelerators
Borowski, M., Pal, C., Saha, S., Poli, L., Zhai, X. and McDonald-Maier, K., (2023). Anomaly Behaviour tracing of CHERI-RISC V using Hardware-Software Co-design
Saha, S. and McDonald-Maier, K., (2022). Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems: A RISC-V Case-Study
Borowski, M., Saha, S., Zhai, X. and McDonald-Maier, K., (2022). Benchmark Tool for Detecting Anomalous Program Behaviour on Embedded Devices
Gao, C., Saha, S., Lu, Y., Saha, R., McDonald-Maier, K. and Zhai, X., (2022). Deep Learning on FPGAs with Multiple Service Levels for Edge Computing
Guha, K., Saha, S. and McDonald-Maier, K., (2022). SENAS: Security driven ENergy Aware Scheduler for Real Time Approximate Computing Tasks on Multi-Processor Systems
Lu, Y., Cong, G., Saha, R., Saha, S., McDonald-Maier, K. and Zhai, X., (2022). FPGA-based Dynamic Deep Learning Acceleration for Real-time Video Analytics
Kejela, C., Devaraj, R., Sarkar, A. and Saha, S., (2022). A Supervisory Control Approach for Scheduling Real-time Periodic Tasks on Dynamically Reconfigurable Platforms
Saha, S., Adetomi, A., Zhai, X., Kasap, S., Ehsan, S., Arslan, T. and McDonald-Maier, K., (2021). EnSuRe: Energy & Accuracy Aware Fault-tolerant Scheduling on Real-time Heterogeneous Systems
Khanam, Z., Saha, S., Ognibene, D., McDonald-Maier, K. and Ehsan, S., (2021). An Offline-Online Strategy for Goal-Oriented Coverage Path Planning using A Priori Information
Lu, Y., Zhai, X., Saha, S., Ehsan, S. and McDonald-Maier, KD., (2021). FPGA based Adaptive Hardware Acceleration for Multiple Deep Learning Tasks
Poli, L., Saha, S., Zhai, X. and Mcdonald-Maier, KD., (2021). Design and Implementation of a RISC V Processor on FPGA
Aslam, B., Saha, S., Khanam, Z., Zhai, X., Ehsan, S., Stolkin, R. and McDonald-Maier, K., (2020). Gamma-induced Degradation Analysis of Commercial off-the-shelf Camera Sensors
Lu, Y., Zhai, X., Saha, S., Ehsan, S. and McDonald-Maier, K., (2020). A self-scrubbing scheme for embedded systems in radiation environments
Chakraborty, S., Saha, S., Sjalander, M. and McDonald-Maier, K., (2020). RePAiR: A Strategy for Reducing Peak Temperature while Maximising Accuracy of Approximate Real-Time Computing: Work-in-Progress
Adetomi, A., Saha, S., McDonald-Maier, K. and Arslan, T., (2020). Proxy Circuits for Fault-Tolerant Primitive Interfacing in Reconfigurable Devices Targeting Extreme Environments
Khaliq, A., Saha, S., Bhatt, B., Gu, D. and McDonald-Maier, K., (2019). Profi-Load: An FPGA-Based Solution for Generating Network Load in Profinet Communication
Dey, S., Singh, AK., Saha, S., Wang, X. and McDonald-Maier, K., (2019). RewardProfiler: A Reward Based Design Space Profiler on DVFS Enabled MPSoCs
Khanam, Z., Saha, S., Aslam, B., Zhai, X., Ehsan, S., Cazzaniga, C., Frost, C., Stolkin, R. and McDonald-Maier, K., (2019). Degradation Measurement of Kinect Sensor Under Fast Neutron Beamline
Majumder, A., Guha, K., Saha, S. and Chakrabarti, A., (2019). Auction Based Power Aware Real-Time Scheduler for Heterogeneous FPGA Cloud Platform
Dey, S., Kalliatakis, G., Saha, S., Singh, AK., Ehsan, S. and McDonald-Maier, K., (2018). MAT-CNN-SOPC: Motionless Analysis of Traffic Using Convolutional Neural Networks on System-On-a-Programmable-Chip
Saha, S., Ehsan, S., Stoica, A., Stolkin, R. and McDonald-Maier, K., (2018). Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh Environments
Guha, K., Saha, S. and Chakrabarti, A., (2018). SHIRT (Self Healing Intelligent Real Time) Scheduling for Secure Embedded Task Processing
Majumder, A., Saha, S. and Chakrabarti, A., (2017). Task Allocation Strategies for FPGA Based Heterogeneous System on Chip
Roy, S., Saha, S., Dey, A., Shaikh, SH. and Chaki, N., (2014). Performance Evaluation of Multiple Image Binarization Algorithms Using Multiple Metrics on Standard Image Databases
Saha, S., Chakrabarti, A. and Ghosh, R., (2013). Exploration of Multi-thread Processing on XILKERNEL for FPGA Based Embedded Systems
Paul, R., Saha, S., Pal, C. and Sau, S., (2012). Novel architecture of modular exponent on reconfigurable system
Paul, R., Saha, S., Sau, S. and Chakrabarti, A., (2012). Real time communication between multiple FPGA systems in multitasking environment using RTOS
Reports and Papers (1)
Khaliq, A., Bhatt, SSB., Gu, D., Howells, G. and McDonald-Maier, K., (2019). FLAG: A Framework for FPGA-based LoAd Generation in Profinet Communication
Grants and funding
2023
FORENSIC: Fast and Autonomous Platform Anomalies detections in CPS
Innovate UK (formerly Technology Strategy Board)
Contact
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