CSEE Seminar series - Dr Leandro Soares Indrusiak

Dr Leandro Soares Indrusiak is a faculty member of University of York's Computer Science department, and a member of the Real-Time Systems (RTS) research group. His current research interests include on-chip multiprocessor systems, distributed embedded systems, resource allocation, cloud computing, and real-time networks, having published more than 140 peer-reviewed papers in the main international conferences and journals covering those topics (nine of them received best paper awards, the last one in 2018). He has graduated eight doctoral students over the past ten years, and currently supervises three doctoral students and three post-doc research associates. He graduated in Electrical Engineering from the Federal University of Santa Maria (UFSM) in 1995 and obtained a MSc in Computer Science from the Federal University of Rio Grande do Sul (UFRGS), Porto Alegre, in 1998. He held a tenured assistant professorship at the Informatics department of the Catholic University of Rio Grande do Sul (PUCRS) in Uruguaiana from 1998 to 2000. His PhD research started in 2000 at UFRGS and extended his MSc work on design automation environments for microelectronic circuits. From 2001 to 2008 he worked as a researcher at the Technische Universität Darmstadt, Darmstadt, Germany, where he finished his PhD and then lead a research group on System-on-Chip design. His binational doctoral degree was jointly awarded by UFRGS and TU Darmstadt in 2003. He is a principal investigator of EU-funded SAFIRE project, and a co-investigator in a number of other funded projects. He serves as the department's Internationalisation Advisor, and has held visiting faculty positions in five different countries. He is a member of the EPSRC College, a member of the HiPEAC European Network of Excellence, a senior member of the IEEE, and a member of York's Sciences Faculty Board.

Wormhole switching is widely used in practice due to small buffering requirements on each network router. This is of key importance in network-on-chip (NoC) architectures, as the small buffers result in low area and energy overheads. However, the nature of wormhole switching allows a single packet to simultaneously acquire multiple links as it traverses the network, which can make worst-case packet latencies hard to predict. This becomes particularly severe in large and highly congested networks, where complex interference patterns become the norm.  Different link arbitration mechanisms can result in different worst-case latency prediction models, and recent research has addressed wormhole networks with TDM, round-robin and priority arbitration. In this talk, I will focus on priority-preemptive wormhole networks and will review the latest research on analytical methods aimed at predicting worst-case packet latency over such networks. I will then show opportunities and advantages of using priority-preemptive wormhole networks in the domains of multi-mode, mixed-criticality and secure systems, where the trade-off between flexibility and predictability that is inherent to such networks can be fully exploited.